List Question
10 TechQA 2025-01-02 23:28:43How to make an array in 'verilog' (code inside)
2.4k views
Asked by M.Sayel
Verilog testbench code using gEDA and iVerilog
1.4k views
Asked by milleraj66
Non Restoring Division in Iverilog
122 views
Asked by Wallace
Trying to design a shift adder using Verilog, and I'm not able to fix this error
140 views
Asked by Anish Kasegaonkar
iverilog : Can't find task randomize in class Packet
110 views
Asked by Alabhya
Assignment error: "Cannot assign to array"
106 views
Asked by Dimitris Papadimitriou
The output I'm getting is wrong
131 views
Asked by Fatima Ismail
is it okay to assign 1 bit reg data type element to 4 bit reg element?
113 views
Asked by superb ranjeet
Rotations Operations for 16bit ALU using multiplexers (updated question)
542 views
Asked by aLIEz
Problem with reset Johson Counter Verilog
129 views
Asked by Carlos Eduardo Fontaneli