Do GCC built in atomic functions provide processor level memory barrier fences?

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I have to use GCC version 4.7.3 which I understand is not fully C++11 compliant (see https://gcc.gnu.org/gcc-4.7/cxx0x_status.html ) and I want to use the GCC built-ins __atomic_load_n etc., on an x86 processor. I am only considering using the __ATOMIC_SEQ_CST memory model.

The question is can I rely on GCC 4.7.3 to put in any necessary memory barriers?

I have tried compiling a few simples but the assemble code generated does not include the "mfence" or other memory barrier instructions that I had expected.

Are there any clear statements that can reassure me that GCC will add any necessary fences or do I have to add them manually to be sure?

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