VHDL: (Data Flow and Control Unit) calculate log2, represented as an unsigned 8-bit integer

Question

I need to design a digital circuit, in the form of Data Flow and Control, to calculate the entire portion of the logarithm at base 2 of a positive number N, represented as an unsigned 8-bit integer in VHDL.

Basically I'll do this:

int log2 (int N) {

    int count = -1;
    while (N>0){
        N = N >> 1;
        count++
    }
    return count;
}

I'll use 8-bit integer to represent the number N and dislocate with 0's to the right. Then, the number of dislocation minus 1, is equal to the log2.

I have already made the entity:

entity log2 is

    port (
        clock, reset: in bit; -- global control: clock and reset
        start: in bit;
        ready: out bit; -- finished execution (equal to 1 when the calculation is finished)
        N: in bit_vector(7 downto 0);
        logval: out bit_vetor(3 downto 0) -- log2(N)
        );
end entity log2;

But I'm struggling with the following process.

I've made a ASM diagram to help, and there it is:

And I also know that I need some data flow elements like:

• for the "reg" i'll need a shift register,
• for the log i'll need a counter register

I've only been able to see this at theory, i'm struggling to put all of this into code.

Does anybody know how can I start the architecture?