Error: COMP96_0207: Tarea_MUX_39203394.vhd : (53, 2): No actual specified for local port "SEL"

Question

library IEEE;

use IEEE.std_logic_1164.all;

entity Tarea_MUX_39203394 is port(

     A : in STD_LOGIC_VECTOR(1 downto 0);
     B : in STD_LOGIC_VECTOR(1 downto 0);
     C : in STD_LOGIC_VECTOR(1 downto 0);
     D : in STD_LOGIC_VECTOR(1 downto 0);
     SEL : in STD_LOGIC_VECTOR(1 downto 0)
     );

end Tarea_MUX_39203394;

--}} End of automatically maintained section

architecture arqui_39203394 of Tarea_MUX_39203394 is
SIGNAL X0, X1: STD_LOGIC_VECTOR(1 downto 0);

Component Tarea_MUX_39203394 is port(

     A : in STD_LOGIC_VECTOR(1 downto 0);
     B : in STD_LOGIC_VECTOR(1 downto 0);
     C : in STD_LOGIC_VECTOR(1 downto 0);
     D : in STD_LOGIC_VECTOR(1 downto 0);
     SEL : in STD_LOGIC_VECTOR(1 downto 0)
     );  

END COMPONENT;

begin

CAJA1: Tarea_MUX_39203394 PORT MAP (A, B, SEL, X0); --THE ERROR IS HERE

CAJA2: Tarea_MUX_39203394 PORT MAP (C, D, SEL, X1); --THE ERROR IS HERE

end arqui_39203394;

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